Flexible Printed Circuitry (FPC) offers a tremendous opportunity for the packaging engineer and electronic designer. These versatile electronic wiring systems can be shaped, bent, twisted and folded into endless dimensional configurations…limited only by an engineer’s origami creativity. In this regard they offer significant design advantages over a two dimensional and inflexible rigid printed circuit board (PCB). This added dimension can make flex circuits a designer engineer’s dream, but with the addition of flexibility come some “rules” that need to be followed (sounds like an oxymoron??) to make certain a robust design is achieved.
Different manufacturing methods and material sets are used for FPC’s and an immediate difference is the dimensional properties. Rigid printed circuits are generally more dimensionally stable vs. the standard polyimide film used as the building block in 98% of the flex circuits produced. This increased dimensional variability means a flexible circuit requires different design rules than its rigid printed circuit board relative. Unfortunately, much of the design software available uses rigid PCB design rules and this can create manufacturing and functional problems for the flexible circuit. Getting a flexible circuit design ready for fab is referred to some in the industry as “flexizing” the design.
The list below details five of the more common ways “flexizing” https://www.hemeixinpcb.com/company/news/319-megtron-6-high-speed,-low-loss,-multi-layer-pcb-material.html makes a design more robust, more producible, and ready for fabrication.
- Solder mask or coverfilm openings: During fabrication flexible circuitry can demonstrate dimensional change after exposure to processes like pumice scrubbing, copper plating, and/or etching. While some change can be accounted for, flexible circuitry design rules generally require larger tolerances to accommodate subsequent registrations for coverfilm, stiffeners, or die cutting. Additional consideration is required for the adhesive squeeze out that occurs during lamination of the coverfilm dielectric. Complicating the prediction of compensating design features is the myriad of processes and sequences required to produce a custom flexible circuit. The bottom line is the openings in the coverfilm generally need to allow more room in a flex circuit design.
- Spacing between solder pads and adjacent traces: Here is the tradeoff, i.e. design compromise, which will be made based on item #1. When the coverfilm or soldermask openings are made larger, the edges of the adjacent conductor traces could be exposed if they were routed too close to a solder pad. This can cause shorts if solder bridges between connector pins or pads. Physical size of the circuit is another factor that can affect registration capability. In general more space is needed between a solder pad and an adjacent conductive trace to accommodate the coverfilm or soldermask placement tolerance.
- Stress points in conductors: Because flex circuitry is used in both fold to install and dynamic flexing applications, trace configurations that are acceptable in a rigid PCB may create problems in a flexible circuit. Conductor traces with sharp corners and acute junctures at the base of solder pads become natural “stress points” when the area near them is flexed. This can result in trace fracture or delamination. A good flexible circuit layout will have a smooth radius for conductor turn points (instead of sharp corners) and a gentile radius from the trace to the pad fillet instead of a sharp angle. Selective attachment of stiffeners will prevent bending in soldered regions and is a common design practice.
- Stacked traces: Traces on opposite sides of the dielectric should not directly “stack” on each other. Traces in tension (on the outside of the bend radius) may crack when the circuit is bent if they directly align in parallel with a trace on the opposite side. The traces in tension are forced farther from the neutral axis of the folded region and can fracture, especially with repeated bending. A good design practice is to keep the copper in the neutral axis of a bend by designing this region as a single conductive layer. When this is not possible, a proper design will “stagger” the traces between top and bottom copper layers to prevent top and bottom alignment.